Abstract: Nvidia has been developing hardware and software technologies to enable this ambitious vision for 6G. Technologies that enable the research community, wireless system developers and network operators. This presentation provides an overview of some of the hardware and software stacks Nvidia has been developing for 5G Advanced and 6G. We provide an overview of a completely software defined 5G performant GPU in-line accelerated layer-1 (L1) implementation called Aerial. Aerial is supplied to end users as highly optimized CUDA source code and hence provides a foundation for developing 3GPP Release-18 and beyond, including 6G, physical layer capabilities. An overview of an open-source layer-2 (L2) and core network (CN) stack integrated with Aerial will be highlighted. Together, this L1, L2 and CN code base is not only a complete 5G NR gNB, but with the full code base available, it is the foundation of a 6G wireless research platform. Bringing AI/ML to wireless requires algorithm innovation and new tools for link layer research. We provide an overview and examples of the new Sionna open-source native-AI library for next-generation physical layer research. Digital twins are being introduced into 5G networks, and will play a large role in the design, optimization, site-specific customization and operation of 6G networks. An overview of the Omniverse software stack for enabling the development of wireless digital twins is provided together with examples of digital twins that have been implemented using the Omniverse platform.

About the speaker: Dr. Chris Dick is a system architect at NVIDIA working on the application of Artificial Intelligence and Machine Learning to 5G and 6G wireless. He is part of the team developing new tools and real-time over-the-air testbeds to enable the path from AI/ML simulation flows to real-time operation. In his 35 years working in signal processing and communications he has worked on silicon and software products for 3G, 4G and 5G baseband DSP and Docsis cable access and vector processor architectures. His research is in the area of 6G architecture, ML model architecture, channel coding, design flows for GPU signal processing systems, digital front-end (DFE) technology for cellular systems with a particular emphasis on digital pre-distortion for power amplifier linearization. Chris has also worked extensively on silicon architecture and compilers for machine learning and parallel architectures.

Prior to moving to Silicon Valley in 1998 he was a tenured academic in Melbourne Australia for 13 years. He has over 250 publications and 90 patents. From 1998 to 2020 he was a Fellow and the DSP Chief Architect at Xilinx.

In 2018 he was awarded the IEEE Communications Society Award for Advances in Communication for research in the area of full-duplex wireless communication.